PhD Students in PMIC Circuit Design for Real Time Control of Multi-Level and Multi-Stage Power Converters
About the Role
Generally, the power systems in every electronics hardware system or device are undergoing a number of major technology paradigm shifts, which is making power control central to achieving the continued performance improvements, which we expect in this “more than Moore” era.
From the grid AC electricity connection to the end application, there are typically five stage of power conversion. Powering architectures are changing so that end‑to‑end efficiency can be pushed into the high eighties percent. The goal is to design control modes so that every stage maintains maximum efficiency and minimum quiescent control power.
Driving this trend for a huge number of last‑stage highly dynamic rails, applications tend to go multi‑core. Highly integrated rails deliver up to 20 A/ns and push the requirement for high dynamic performance up‑stream to other stages in the powering architecture, such as the 48 V – 5/12 V DC‑DC modules.
Emerging new multi‑stage topologies combine switched capacitor stages with traditional switch‑mode inductor‑based stages. These new power topologies achieve very high efficiencies and have unrealised potential to achieve very high dynamic performances. The PhD research themes are specifically about innovating in power control and management ICs for DC‑DC converters, specifically with the goals of bringing high dynamic performance to hybrid multi‑stage, multi‑level flying capacitor (FCML) or hybrid resonant switched capacitor (ReSC) DC‑DC converter.
Key Responsibilities
Complete your PhD research degree in high dynamic performance, real‑time CMOS power management (PMIC). Your research will significantly advance the state‑of‑the‑art from both research and commercial perspectives.
Complete mixed‑signal PMIC integrated circuit prototypes (“test chips”) from concept, circuit design through silicon layouts, tape‑out and silicon test characterization in the Design evaluation laboratory. These test chips will implement a complete integrated switch‑mode power system including power path, gate drives and control, to showcase the noteworthy advancements made by your research.
Perform experimental test characterisation of your stand‑alone prototype PMIC test chips to showcase your advances in mixed‑signal, high dynamic performance, real‑time power control as applied to select power topologies.
Author or co‑author peer‑reviewed publications of international standing.
Engage in the dissemination of the results of the research, in other fora, as directed by and in conjunction with senior MCCI research staff. There will be presentations for in‑house and company internal conferences.
Manage/participate in education and public outreach engagement activities, as required.
Ensure all activities are compliant with MCCI Processes and the Tyndall Quality Management System.
Carry out any additional duties as may reasonably be required within the general scope and level of the post.
About You
You will be ambitious to achieve a high‑quality research PhD through publications in pre‑eminent tier 1 conferences and journals from University College Cork.
You plan to dedicate yourself to a strong technical career in the area of power management with advanced digital control.
Essential Criteria
The ideal applicant will have a 1st class honours degree in electronic engineering or related discipline.
Evidence of a strong desire to innovate and pursue advanced research.
Evidence of being highly analytical, with good interpersonal and organisational skills.
Strong fundamental knowledge in core disciplines such as engineering mathematics, analog circuits, control systems theory and power electronic systems.
Strong technical writing and communications skills.
Desirable Criteria
Master’s Degree in a relevant research area in electronics.
Specialised modules at under‑graduate level in CMOS IC design, power electronics, control system design or digital signal processing.
Good understanding of switch‑mode converter design and magnetic component operation.
Good understanding of continuous and discrete time controller design methodologies.
Experience with mixed‑signal IC design.
Experience with mathematical modelling tools, such as MATLAB or Python.
Experience with integrated circuit design tools, such as Cadence or Mentor.
What we offer
You will have the opportunity to pursue your research to the highest level in a world‑class CMOS technology design centre that has a young, dynamic, vibrant and self‑driven research environment. You will be part of a large, collegial and supportive team of researchers at all levels of experience and across a variety of relevant disciplines.
There will be a 6‑month internship at Analog Devices Ireland Design Centre Office at the beginning of the PhD period.
There is an excellent research environment, which is co‑located with many world‑leading research groups.
These PhD research themes are of strong strategic relevance to the sponsoring company and as such there will be access to company expertise, through means such as internal corporate technical conferences or internship at an ADI site.
Great career development and advancement that is highly visible to the semiconductor industry through direct contact with the sponsoring company, other MCCI member companies’ base and through IEEE publications and conferences.
Opportunities to publish and present at the leading conferences such as IEEE Solid‑State Circuits conferences will be very strongly supported and indeed will be your primary focus.
Attend training courses and workshops, use the latest industry CAD design tools.
A generous tax‑free scholarship stipend payment including tuition fees covered.
20 days per annum annual leave for full‑time research students, in addition to public holidays.
Full coverage of travel expenses to international conferences to present project outcomes.
Training and development opportunities are also provided.
Terms of Studentship
Contract: Full Time/ Fixed Term. The annual stipend is €25,000.00 for 4 years. In addition, annual tuition fees will be paid by the Tyndall National Institute.
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