**Expert Verification Engineer Opportunity**
We are seeking a highly skilled verification engineer to lead the development of cutting-edge verification environments for complex systems.
Key Responsibilities:
* Design and develop advanced verification platforms using innovative technologies.
* Create and manage automated regression testing frameworks using Cadence vManager tools.
* Collaborate closely with cross-functional teams, including design, firmware, and hardware engineers, to ensure seamless interface compliance for standards like PMBus, I2C, AHB, etc.
* Track project progress against key milestones and provide detailed reporting.
Requirements:
* Masters degree in Electronic Engineering or related field (PhD preferred).
* Minimum 10 years of experience in verification, with expertise in both hardware and firmware.
* Proficiency in UVM, SystemVerilog, and assertions.
* Experience with Cadence vManager, vPlan, and regression management.
Benefits:
This role offers a unique opportunity to work on high-profile projects and contribute to the growth of our organization.
Others:
Please submit your resume and cover letter to apply for this exciting opportunity.