Analog Layout Engineer
We are seeking a motivated and creative Analog Layout Engineer to join our team developing Industry 4.0 leading silicon solutions to drive growth in our global business. The successful candidate will join a dynamic team in Limerick with excellent opportunities to work on leading edge development in Sustainable Industrial automation. The role focuses on large silicon systems across multidisciplinary cross‑functional teams, including Analog and Digital Design, physical implementation, and CAD groups.
Responsibilities
Layout ownership for full‑chip and large‑scale analog/mixed‑signal blocks from floorplan through tapeout
Floorplan development at block, subsystem, and full‑chip levels for designs of significant size and complexity
Top‑level integration of mixed‑signal chips, including coordination between IP owners and digital physical design teams (as applicable)
Schedule and milestone ownership for assigned layout scope, including resourcing and execution planning where applicable
Physical verification leadership, including DRC, LVS, ERC, antenna, density, extraction, and signoff documentation
Parasitic extraction coordination and support of post‑layout simulation/debug to close performance targets
Reliability and robustness closure, including EM/IR, ESD‑aware layout, latch‑up prevention, and isolation strategy
Analog layout best practices execution, including matching techniques, shielding, noise isolation, supply integrity considerations, and substrate/well strategy
Cross‑functional partnership with circuit design, verification/validation, packaging, foundry, assembly, reliability, and failure analysis teams to enable design closure
Methodology improvement, including development of checklists, templates, reusable collateral, and (where applicable) automation/scripting to reduce re‑work
Technical leadership and mentoring for junior layout engineers; contribution to team standards and knowledge sharing
Technical communication, including clear reporting of status/risks, and preparation of supporting material for design reviews
Minimum Qualifications
Bachelor’s degree in Electrical/Electronic/Computer Engineering (or related field) or equivalent experience
10+ years of full‑custom IC layout experience with analog/mixed‑signal designs (block and/or full‑chip)
Proficiency with industry‑standard custom layout tools and verification/signoff flows
Proven ability to lead layout to signoff, including strong debug skills for physical verification issues and signoff closure
Proven expertise in analog layout fundamentals, including matching techniques, shielding/noise isolation, substrate/well strategy, latch‑up prevention, and ESD‑aware layout
Demonstrated ownership mindset: self‑motivated, takes responsibility, and consistently closes complex layout problems
Strong planning and organizational skills (schedule/milestone ownership for assigned scope)
Strong written and verbal communication skills; ability to produce clear supporting documentation
Demonstrated ability to collaborate effectively across multi‑discipline, multi‑site global teams
Preferred Qualities
Experience as layout chip lead and/or top‑level integration lead on large mixed‑signal designs
Experience in advanced CMOS nodes
Experience with top‑down integration methodologies, including AoT (Analog‑on‑Top) and DoT (Digital‑on‑Top) flows
Experience integrating large digital IP and partnering with digital physical design teams
Experience with high‑voltage layout and/or BiCMOS technologies
Scripting/automation experience (e.g., SKILL, PERL, AMPLE, or similar) to improve flow efficiency and quality
PCELL creation experience
Track record of defining/improving layout methodologies, reusable IP, checklists, and documentation that measurably reduce re‑work
Equal Employment Opportunity (EEO) Statement
Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
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