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Sta design engineer - static timing analysis - cork, ireland

Kildare
Qualcomm
Design engineer
Posted: 10h ago
The role
Company
QT Technologies Ireland Limited
Job Area
Engineering Group > ASICS Engineering
General Summary
As a Qualcomm STA Engineer, you will perform static timing analysis, develop timing constraints, and optimize timing performance for a variety of high-performance, high-quality, low-power world‑class products. You will collaborate with cross‑functional teams to ensure timing closure and validate timing models, contributing to successful product development.
Responsibilities

Perform STA and timing closure for complex cores and full‑chip SOCs.
Enhance techniques and methodologies for STA and timing closure.
Drive accuracy of timing closure and static/dynamic flows to reduce turnaround time.
Ensure compliance with timing signoff checklists and criteria.
Automate timing and power data mining and processing.
Participate in project proposal development including key milestones and deliverables.
Execute and deliver project goals in a timely manner with production support.
Resolve issues in all phases of development to ensure smooth project execution.

Desired Qualifications

Expertise in STA tools (PrimeTime, PrimeShield, or Tempus) used for hierarchical analysis in large SoCs.
Hands‑on experience with Tweaker, PrimeClosure, PTECO, or Tempus ECO for timing closure.
Highly proficient in automation: Python, TCL or Perl.
Strong knowledge of ASIC design flows (RTL‑to‑GDS).
Interest in Design for Parametric Yield is an added advantage.
Comfortable with extraction, circuit simulation tools and environments.
Excellent problem‑solving skills and result‑driven approach, able to work and drive practical solutions in a research environment.
Good communication and personal skills in a multi‑disciplinary, fast‑paced engineering environment.
4+ years of related work experience.

Minimum Qualifications

Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
OR Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.

Benefits

Salary, stock and performance‑related bonus.
Maternity/Paternity Leave.
Employee stock purchase scheme.
Matching pension scheme.
Education assistance.
Relocation and immigration support (if needed).
Life, medical, income and travel insurance.
Subsidised memberships for physical and mental well‑being.
Bicycle purchase scheme.
Employee run clubs, including running, football, chess, badminton and more.

Location
Cork, Ireland. Cork offers a high quality of life, a strong economic engine and access to international travel via Cork Airport.
Equal Opportunities
We are an Equal Opportunity employer; all qualified applicants will receive consideration for employment without regard to race, colour, religion, sexual orientation, gender identity, national origin, disability, veteran status, or any protected classification.
Qualcomm is an equal‑opportunity employer.
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