Overview
Analog Devices, Inc. is looking for a Lead Designer, Layout to join our European CSS Layout Team. The candidate will be self-motivated, willing to learn exciting new technologies and develop new products, but also be able to work effectively within a talented group of individuals across multiple development locations. The candidate will join a team of Analog, Digital, Mixed-Signal CMOS designers, Mask Layout designers, Verification and Validation engineers, Algorithm and Software developers, Packaging and Test engineers, implementing state of the art PMIC. The candidate will be involved in but not limited to the following developments:
* LDO, BUCK, BOOST, BUCK-BOOST, CHARGE-PUMP, SIMO (Single-Input / Multiple Outputs), IBB (Inverted BUCK-BOOST)
* Oscillators, PLL, Bandgap, References, ADC, DAC, I/O
Responsibilities
* Top Level Integration
* Execute top level integration of large-scale mixed signal and PMIC chips.
* Manage communication between IP owners and drive a top-down approach to top level integration.
* Interface with Digital Physical design to integrate large digital IP.
* Full verification sign-off with supporting documentation.
* IP Development
* Execute on IP Mask Layout Design
* Collaborate with IP Designers and understand sub-circuitry sensitivities
* Take responsibility/ownership for layout of large-scale IP/Sub Systems, including scheduling, Floorplanning, verification.
* Co-ordinate the workload for small layout sub teams within a larger project team
* Provide customer facing documentation.
* Enable a culture of continuous learning and improvement
* Provide Mentorship and technical leadership, setting up framework and structure for efficient development flows.
* Support project management, task planning, Schedule and resources
Key Competencies
* Experience in use of Cadence Virtuoso IC61/IC18/IC20
* High proficiency in use of VXL
* Experience in use of Mentor Graphics Calibre
* Experience with Floorplanning large Blocks
* Experience of Top-Down methodologies
* Experience of both AoT (Analog on Top) & DoT (Digital on Top) flows
* High proficiency in interpretation of LVS/DRC/ERC/ANTENNA/DENSITY/DFM
* Expertise in standard layout practices such as Layout matching, parasitic, noise & noise isolation, supply consideration, latch up, shielding, Well’s substrates and Isolation.
* Experience in laying out circuits for ESD consideration
* Excellent planning and organizational skills.
* Good interpersonal and communications skills.
* Ability to work well in a global team environment
* Ability to work with the design team to minimize layout re-work by improving processes, checklists, documentation
* Scripting skills in PERL or SKILL considered an advantage
* Good written and verbal communication
Key Qualifications
* BE/BSc Electronic Engineering or equivalent
* 5-10 years’ experience in IC Layout
* Scripting skills in PERL or SKILL or AMPLE are considered a plus, but not required
* Good team worker with multi-discipline, multi-cultural and multi-site environments
Why You Will Like Working At ADI
* We place great value on individual judgment
* We allow our employees the freedom to explore new ideas and the autonomy to determine how to best achieve business goals and objectives
* We emphasize professional development and mentoring
* Above all, we recognize that the personal goals of our employees and the company’s goals are closely related and must support each other
For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.
Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, sex, sexual orientation, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
Job Type: Experienced
Required Travel: Yes, 10% of the time
Shift Type: 1st Shift/Days
Seniority level
* Mid-Senior level
Employment type
* Full-time
Job function
* Design, Art/Creative, and Information Technology
Industries
* Semiconductor Manufacturing
#J-18808-Ljbffr