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About the Role
The AMD SerDes team in Ireland is hiring a Staff-level digital design engineer to develop digital designs for complex mixed-signal ICs using the latest CMOS FinFET processes.
Key Responsibilities
* Implement RTL designs for complex clock and data recovery algorithms, adaptive digitally assisted control loops, and advanced DSP designs for power-efficient channel equalization solutions.
* Collaborate with the architecture team to understand proposed algorithms and provide feedback on design implementation.
* Perform digital design verification to ensure functionality before hand-off to the verification team.
* Use industry-standard tools for HDL checking, including CDC, RDC, and Lint.
* Support the verification team in debugging issues.
* Assist with silicon bring-up and debugging.
Requirements
* Extensive experience in RTL design methodologies, specification development, and implementation.
* Familiarity with RTL design using HDL such as Verilog or VHDL, with a preference for Verilog.
* Experience with modern digital ASIC methodologies, including verification, STA, signal integrity, DFT, synthesis, and physical implementation.
* Experience with tape-out in advanced foundry process technologies.
* Excellent written and oral communication skills.
* Strong interpersonal and teamwork skills.
Benefits
We offer a comprehensive benefits package, which includes health insurance, retirement plans, paid time off, and more.
How to Apply
To be considered for this role, please submit your application through our website.