Develops the logic design, register transfer level (RTL) coding, and simulation for FPGAs to generate cell libraries, functional units, IP blocks, and subsystems for integration in full chip designs.
Participates in the definition of architecture and microarchitecture features of the block being designed.
Creates prototypes, simulates models, and specifies systems requirements.
Prepares and designs logic diagrams and codes for implementing system design and test specifications.
Delivers software models for device level bring up, including user visible functionality, timing, and power.
Applies RTL implementation techniques to qualify the design to meet required power, performance, and area goals, partnering with physical implementation team.
Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
Qualifications:10+ years of industry experience, or a Master's Degree with 7+ years overall experience.
Experience in:
Logic design, register transfer level (RTL) coding, and simulation for FPGAs full chip designs.
Definition of architecture and microarchitecture features of the block being designed.
Creation of prototypes, simulation models, and specification of systems requirements.
Delivery of software models for device level bring up, including user visible functionality, timing, and power.
Verification and implementation experience.
#LI-SE1
Job Type:RegularJob Details:Job Description:Develops the logic design, register transfer level (RTL) coding, and simulation for FPGAs to generate cell libraries, functional units, IP blocks, and subsystems for integration in full chip designs.
Participates in the definition of architecture and microarchitecture features of the block being designed.
Creates prototypes, simulates models, and specifies systems requirements.
Prepares and designs logic diagrams and codes for implementing system design and test specifications.
Delivers software models for device level bring up, including user visible functionality, timing, and power.
Applies RTL implementation techniques to qualify the design to meet required power, performance, and area goals, partnering with physical implementation team.
Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
Qualifications:10+ years of industry experience, or a Master's Degree with 7+ years overall experience.
Experience in:
Logic design, register transfer level (RTL) coding, and simulation for FPGAs full chip designs.
Definition of architecture and microarchitecture features of the block being designed.
Creation of prototypes, simulation models, and specification of systems requirements.
Delivery of software models for device level bring up, including user visible functionality, timing, and power.
Verification and implementation experience.
#LI-SE1
Job Type:RegularShift:Shift 1 (Ireland)Primary Location:Dublin, Ireland (Remote)Additional Locations:Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
About Altera Altera: Accelerating Innovators
Altera, an Intel Company, provides leadership programmable solutions that are easy-to-use and deploy in applications from cloud to edge, offering limitless AI possibilities.
Ourend-to-endbroad portfolio of products including FPGAs, CPLDs, Intellectual Property, development tools, System on Modules, SmartNICs and IPUs provide the flexibility to accelerate innovation.
Altera is helping to shape the future through pioneering innovation that unlocks extraordinary possibilities for everyone on the planet.
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