As a Senior Principal Logic Design Engineer, you will play a pivotal role in developing and implementing cutting-edge SoC and compute-based systems. Working closely with the development team, you will drive innovation and design solutions that showcase the capabilities of subsystems and components.
The ideal candidate will have extensive experience in IP integration and designing SoC reference systems, integrating compute, memory, and interface IP in system designs, analysing IP products and implementation flows, identifying gaps and working with development teams to improve products, developing collateral and training material for customers, and identifying and implementing best practices in hardware design, testing, and validation to improve efficiency and reliability.
To be successful in this role, you must have:
* A Bachelor's degree in Electronic Engineering/Computer Science with 15+ years of work experience, or a Master's degree in EE/CS with 8+ years of experience
* At least 4 years of experience in ASIC design, integration, or verification teams
* Expertise in domains such as processor design, on-chip communication and interconnects, high-speed interfaces, or chiplets
* Proficiency in RTL design techniques, including synthesis, timing closure, and verification
* Experience with UVM for functional verification of ASIC designs
This is an excellent opportunity to leverage your expertise and contribute to the success of our organization. If you are passionate about advancing technology and driving innovation, we encourage you to apply.