Principal Analog Layout Engineer, GalwayClient: ChiprightLocation: Galway, IrelandEU work permit required: YesJob Reference: 23dabeb3d4e8Posted: 17.03.2026Expiry Date: 01.05.2026Job Description:Principal Analog Layout EngineerMinimum 5 years experience but ideally >8+ years experienceExperience in 65nm and below (ideally 22nm and below)Understanding of layout for critical timing (PLL, DLL, clock distribution)Understanding of matching techniques for timing circuits and current cellsChip finishing experience a bonusExperience of Cadence PVS/QRC/Pegasus
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