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* Produce high quality Analog/RF systems/sub-systems using industry best practice methods for design, verification and test according to project plans.
* Generate, document and verify behavioural models of analogue and analogue-mixed-signal blocks (e.g. using VerilogA/AMS, SystemVerilog-RNM, Wreal) and ensure they are optimised and kept up to date.
* Write verification plans and create automated test benches.
* Design and verify RF/Analog blocks/subsystems (e.g.LNA, PA, VCO, PLL, mixers, bandgaps, LDO, DC-DC, ADC, DAC, etc), up to an operating frequency of 20GHz, using industry standard tools and designflows.
* Work closely with IC Layout Design Engineers to optimise design andlayout.
* Ensure that designs follow industry best practice design flows, verification techniques, DesignForTest (DFT), isolation, power optimisation etc.
* Support lab evaluation, characterisation and test.
Interpersonal
* Interact with other engineers in the mixed signal, and digital/systems/SW/apps/test teams to ensure products are delivered to meet or exceed specifications on time and in budget.
* Good team player with good interpersonal skills but can work independently on complex tasks.
* Help drive continuous productivity improvements through improved work methodologies, efficient tool use and good documentation.
* Mentor junior employees and interns.
Qualifications
* Minimum Masters of Science in Electronic Engineering or related field.
* 10+ years relevant industrial experience required.
* Excellent working knowledge of the Cadence Virtuoso design environment.
* Detailed design experience of analog/mixed-signal circuits on advanced CMOS nodes (40nm and lower).
* Clear and concise communication and presentation skills.
* Experience with getting full chip designs to product release preferred.
* Experience with high frequency RF designs is desired.
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