Digital Solution Architect
We are seeking an experienced Digital Design Engineer to lead and influence the development of advanced digital solutions.
Job Summary:
This role involves leading the design and development of digital IP for ASIC or FPGA platforms, defining architecture, contributing to specification development, delivering high-quality RTL using Verilog or VHDL, guiding and reviewing synthesis, timing closure, and integration activities, working with verification teams on functional coverage and UVM-based testbenches, and mentoring junior engineers and providing technical leadership across projects.
Key Responsibilities:
* Lead Digital Solutions Development: Oversee the design and development of digital solutions, ensuring they meet project requirements and timelines.
* Define Architecture and Specifications: Define the architecture and contribute to the development of specifications for digital solutions.
* Deliver High-Quality RTL Code: Deliver high-quality register-transfer level (RTL) code using Verilog or VHDL, meeting industry standards and best practices.
* Guide Synthesis, Timing Closure, and Integration: Guide and review synthesis, timing closure, and integration activities to ensure successful project outcomes.
* Collaborate with Verification Teams: Work with verification teams to develop functional coverage and UVM-based testbenches for digital solutions.
* Mentor Junior Engineers: Mentor junior engineers and provide technical leadership across projects, ensuring the growth and development of team members.
Requirements:
* 7+ Years of Experience in Digital Design: 7+ years of experience in digital design within a semiconductor or related environment.
* Strong RTL Design Expertise: Strong expertise in RTL design (Verilog/VHDL), with a solid understanding of system-on-chip (SoC) architecture.
* Industry-Standard EDA Tools: Proven experience with industry-standard electronic design automation (EDA) tools for synthesis, timing, and simulation.
* SystemVerilog and UVM-Based Verification: Exposure to SystemVerilog and UVM-based verification environments.
* Low-Power Design Techniques: Experience with low-power design techniques, clock domain crossing, and design for testability (DFT) is advantageous.
* Degree in Electronic Engineering: Degree in electronic engineering, computer engineering, or a related field.
Benefits:
This role offers opportunities for professional growth and development, collaboration with experienced professionals, and the chance to work on cutting-edge digital solutions. If you are passionate about digital design and want to make a meaningful contribution to our organization, please submit your application.