Job Summary:
We are seeking a highly skilled Video Design Verification Engineer to join our team.
Key Responsibilities
* Develop and implement verification test benches and environments in System Verilog/UVM
* Collaborate with architects, software engineers, and designers to define and develop test methodology and content
* Participate in micro-architecture reviews and provide feedback on design and development
* Collect, organize, and execute various forms of system-level test content, including directed test cases, standards compliance test suites, and system-level scenarios
* Build automation for continuous integration and testing based on the latest IP
* Work with team members to understand and align on narrow scopes of feature development and meet targets
* Write technical documentation and feature descriptions for straightforward projects under the direction of a supervisor
* Scripting and automation skills (Python, Make, etc.)
* Experience with formal verification is a plus
Requirements
* Minimum 2 years of DV experience using UVM/assertion-based verification technologies
* Experience in verifying complex SoC or SoC subsystems
* Experience with caches and DDR memory protocol verification
* Exposure to firmware/driver development using C++
* Exposure to successful tapeouts from conception to post-silicon debug
* Exposure to formal verification
* Experience with power-aware simulations
* Experience with perf and power verification
* Experience with gate-level simulations
* Skill proficiency: UVM, SystemVerilog, assertion, C++, Python, Power-Aware Simulations
What We Offer
* A competitive salary and performance-related bonus
* Maternity/Paternity Leave
* Employee stock purchase scheme
* Matching pension scheme
* Education Assistance
* Relocation and immigration support (if needed)
* Life, Medical, Income, and Travel Insurance
* Subsidized memberships for physical and mental well-being
* Bicycle purchase scheme
* Employee-run clubs, including running, football, chess, badminton, and more
Qualifications
Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field.
References to a particular number of years' experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.
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