Design Verification Engineer - Security / SOC / UVM / GLS 6 days ago Be among the first 25 applicants
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Senior Principal Consultant | Semiconductor, Embedded Systems, AI, Robotics and Machine Learning Design Verification Engineer - Security / SoC / UVM / GLS / Gate Level Simulation Would you like to join one of the world's semiconductor powerhouses?
We're working with a leading company in the field seeking several Design Verification Engineers to join their Hardware Security team onsite/hybrid in Cork, Ireland, within the Silicon Valley of Europe.
In this role, you will collaborate with global experts in architecture, software, SoC design, and security testing.
Your work will support large subsystems such as CPUs, NoCs, cryptographic accelerators, and key management systems.
What's in it for you?
Competitive salary, bonus, RSUs, pension (8% match), generous vacation, wellbeing days, and hybrid working arrangements, all within a diverse and innovative team developing cutting-edge technology.
Requirements include: BSc/MSc in Science, Engineering, or related fields.
Experience in hardware/software design, testing, and verification for SoCs using industry-standard tools and methodologies.
Proficiency in developing unit and SoC level test benches using VMM/OVM/UVM.
Experience with Gate Level Simulation (GLS) verification flows for SoC verification.
Experience in security hardware, cryptographic algorithms, and security concepts is advantageous.
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Additional Details Seniority level: Mid-Senior level Employment type: Full-time Job functions: Engineering, IT, others Industries: Hardware manufacturing, software development, semiconductor manufacturing #J-18808-Ljbffr