Client:Our client a leading Multinational Semiconductor Software provider requiresPrincipal Digital Back Engineerfor role based inCork City, Ireland.The role requires the candidate to be onsite 4 days per week.Role:This position has the exciting challenge of being part of a growing team of Digital Back End Engineers that enable customers to implement design with Cadence tools.Responsibilities:Understanding of Digital microarchitecture definition and documentationUnderstanding of RTL logic design, debug and functional verificationUnderstanding of IP integration and verificationUnderstanding of digital architecture trade-offs for power, performance, and areaUnderstanding of proper handling of multiple asynchronous clock domains and their crossingsUnderstanding of synthesis timing constraints, static timing analysis and constraint developmentUnderstanding of fundamental physical design flows, e.g. floor planning and clock tree synthesisUnderstanding of the impacts of Analog and mixed-signal design and verification on digital-on-top development flow.Understanding of functional ECO flow and conformal ECOExperience with FPGA and/or emulation platformFirmware development of embedded microcontroller systems is a plus.Substantial experience with Verilog is required, as are excellent logic and debug skills.Experience:Minimum 5 years of ASIC backend design experience.Must have gone through successful tapeouts in advance technology nodesContact:For further information please contact Mícheál at Software Placements on or email