Verification Engineer Opportunity We are seeking a skilled Verification Engineer to join our team in defining, designing, and verifying high-speed memory subsystem solutions. 1. Create advanced verification environments using System Verilog and UVM for memory subsystems and associated IP. 2. Develop and maintain robust testbenches and co-verification frameworks with industry-standard simulators like VCS. 3. Analyze functional coverage, code coverage, manage regressions and integrate Memory VIP within the project scope. A strong background in Object-Oriented Programming is required as well as experience working with Python or Shell scripting along with Git/Perforce version control systems. A Bachelor's or Master's degree in Electrical Engineering or Computer Science is also preferred.The role involves close collaboration with globally distributed teams resulting in opportunities for personal growth through technical mentoring of fellow engineers.To be successful in this role you should have solid knowledge of DDR/JEDEC standard IP - provided that you've got good practical skills here - though it is not necessary at all; any existing experience will suffice because learning these things on-the-job isn't out-of-question here!