Mixed Signal Design Verification Engineer
Chipright is seeking highly motivated and experienced AMS Verification engineers to work on developing and delivering IP to our customers. This is a fantastic opportunity for talented engineers to join a team of highly experienced professionals.
Requirements
* 5+ years of AMS Verification/Validation experience
* Define MSDV plans for mixed signal chip designs, following the AMS requirement-driven DV flow
* Define and implement top-level testbenches using SystemVerilog, including test cases and verification attributes such as checkers and stimulus packages. UVM knowledge is a plus.
* Develop behavioral models for analog blocks using Verilog and create self-checking mixed-signal testbenches to verify and establish model vs. schematic equivalence
* Experience with Cadence-based AMS flow: creating test schematics, configuration views, ADE-L Interface, connecting modules, simulator options, etc.
* Comfortable with batch mode simulation bring-up
* Ability to understand UNIX shell scripts
* Debug test failures, follow up on design issues, and drive to resolution
* Regular reporting of status, progress, activities, risks, and impediments
Desirable
* A team player with good communication skills and experience delivering solutions/services to a multinational client
#J-18808-Ljbffr