Based in the Company's headquarters in Dublin, Ireland, the Principal IC Verification Engineer implements verification for block level, SoC subsystems and SoC top-level designs that use advanced verification methodologies and meet established content, performance, quality, cost, and schedule goals.
JOB RESPONSIBILITIES:
1. Work with RTL designers, system architects and block level verification engineers to develop top level verification requirements and test plans based on specifications.
2. Develop, maintain and publish verification specifications.
3. Analyze and debug simulation failures.
4. Generate code coverage and functional coverage report.
5. Participate in the development of department level processes, including the documentation of processes and procedures, and recommendations for improvements to existing processes.
6. Create, track, and close bugs in bug tracking tool.
7. Gate level simulations.
8. Regression analysis.
REQUIRED SKILLS:
1. Fluent in UVM and System Verilog.
2. An understanding of object-oriented concepts and experience designing class-based test benches.
3. Experience in writing test plans and creating directed and random test cases.
4. Strong scripting skills in Perl, Python, shell etc.
5. Strong problem solving skills to quickly identify and provide solution under tight schedule pressure.
6. Excellent written and oral communication skills.
7. ASIC design experience considered an advantage.
8. Experience of mathematical modelling in MATLAB, Python or similar considered an advantage.
9. Experience of wired/wireless protocols considered an advantage.
10. Experience working with FPGA-based prototyping considered an advantage.
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