Company:
QT Technologies Ireland Limited
Job Area:
Engineering Group, Engineering Group > ASICS Engineering
General Summary
Qualcomm's Analog Mixed-Signal IP (MSIP) team is currently seeking talented analog / mixed-signal designer engineers to work on Rx / Tx IO blocks, DLL, clocking and next-generation high frequency related circuits. You will be directly involved in delivering next-generation analog/mixed-signal block designs for our DDR and Chip-to-Chip PHY team and will be part of a growing team involved in architecture analysis in leading-edge FinFET and Gate-All-Around (GAA) process technology nodes at 2nm and beyond. Design goals include low-power and high speed analog mixed-signal designs for a wide array of Snapdragon SoC products.
Responsibilities
Architecture, design and development of high-speed mixed-signal circuits for LPDDR5, LPDDR6 and next-generation LPDDR systems
Custom blocks include high-speed Rx / Tx, clock distribution, clocking delay elements (DLL/PLL), references blocks and band-gap circuits
Circuit design for next-generation chip-to-chip architectures
Custom schematic capture, SPICE analysis and exhaustive pre-silicon validation
Post-silicon bringup support and system enablement
Working closely with the Analog Mask Layout and Physical Design teams to deliver IP on the latest technology nodes
Power Delivery and Signal and Power integrity
Skills and Experience we would love to see
Master’s or Ph.D. degree in Science, Engineering, or related field
5+ years of transistor level analog mixed-signal design experience, preferably in high-speed wireline DDR, SerDes, PLL, or other high speed applications
Experience in SPICE simulators and schematic capture tools
Experience in designing op-amps, bandgaps, differential amplifiers, VCO, PLL, DLL
Experience in high-speed DDR, SerDes or IO block level designs such as transmitters, receivers, high speed VGA, CTLE, CDR, etc.
Understanding of signal integrity in high-speed wireline design is preferred
Scripting and GenAI experience to automate circuit design and verification work is preferred
Full-custom analog layout techniques and the ability to take a design and complete the layout extract verification and sign-off
Excellent communication skills and ability to contribute strongly within a high-performance team
Minimum Qualifications
Bachelor's degree in Science, Engineering, or related field.
3+ years ASIC design, verification, or related work experience.
2+ years of ASIC design, verification, validation, integration, or related work experience.
1+ year of ASIC design, verification, validation, integration, or related work experience.
Ph.D. in Science, Engineering, or related field.
Where you will be working
Cork has a proud reputation as Ireland's second largest economic engine and is now one of the Top 20 location choices in Europe with 39,000 people being employed by over 170 overseas companies. There's a growing diversity in the region with people from many nationalities relocating to Cork, relishing the opportunity to work and live in a location that offers an excellent quality of life. A gateway to Europe, Cork airport provides access to almost 50 international destinations including transatlantic air routes.
Equal Opportunities
We are an Equal Opportunity employer; all qualified applicants will receive consideration for employment without regard to race, colour, religion, sexual orientation, gender identity, national origin, disability, veteran status, or any protected classification.
What's on Offer
Apart from working in an open, relaxed and collaborative space, you will enjoy:
Salary, stock and performance related bonus
Maternity/Paternity Leave
Employee stock purchase scheme
Matching pension scheme
Education Assistance
Relocation and immigration support (if needed)
Life, Medical, Income and Travel Insurance
Subsidised memberships for physical and mental well-being
Bicycle purchase scheme
Employee run clubs, including, running, football, chess, badminton + many more
If you would like more information about this role, please contact Qualcomm Careers.
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