IC Design Engineer – Cork, Ireland
Salary:
up to €100,000 depending on experience (would look at more junior staff as well)
Benefits:
Training, development and progression to management
I'm currently supporting a leading European technology organisation in their search for a
Back-End CMOS Design Engineer
to join their growing hub based in Cork, Ireland. This company works across high-performance integrated systems, collaborating with some of the top technology firms and research bodies across Europe.
This is an exciting opportunity to be part of advanced
SoC development projects
, working closely with international teams and contributing to cutting-edge design in deep sub-micron CMOS processes. The role offers excellent scope for professional growth, competitive salary, and the chance to work on major European innovation projects.
The Role
As a
Back-End CMOS Design Engineer
, you'll be responsible for the back-end design of advanced SoC devices, specifically in deep sub-micron CMOS technologies (28nm FD SOI CMOS or similar). You'll play a key role in digital back-end design flows and collaborate with highly skilled teams across Europe.
What We're Looking For
* 2–5 years of hands-on experience in CMOS back-end design
* Strong skills in:
* RTL to Gate
: Synopsys tools (scripting, synthesis, formality, ATPG, timing closure)
* Gate to GDS
: Cadence tools (scripting, place & route, clock tree generation, GDS generation, timing closure, power/signal integrity, DRC, LVS, electromigration, antenna effects, etc.)
* Must be an EU citizen with a clean criminal record
Why Apply?
* Opportunity to work on
high-profile European projects
* Be part of an expanding Irish hub with direct collaboration across Europe
* Career progression and professional development support
* Competitive package in line with experience
If you're an ambitious engineer with solid CMOS back-end design experience and want to take the next step in your career, I'd be keen to speak with you.
dairis.-
CMOS | Backend Design | SoC | ASIC | VLSI | RTL | RTL to Gate | Gate to GDS | Synopsys | Cadence | Place and Route | P&R | Timing Closure | ATPG | Formality | Clock Tree | GDSII | Power Integrity | Signal Integrity | DRC | LVS | Antenna Effects | Electromigration | Density Checks | 28nm | FD SOI | Submicron CMOS | IC Design | Digital Design | Semiconductor | Electronic Engineering | IC Verification | System on Chip | Integrated Circuits | Physical Design | EDA Tools | Backend Engineer | Ireland | Cork