Company:QT Technologies Ireland LimitedJob Area:Engineering Group, Engineering Group > ASICS EngineeringGeneral Summary:Job DescriptionAs a Qualcomm STA Engineer, you will perform static timing analysis, develop timing constraints, and optimize timing performance for a variety of high-performance, high-quality, low-power world-class products. You will collaborate with cross-functional teams to ensure timing closure and validate timing models, contributing to the successful execution of product development.The STA team at Qualcomm is responsible for evaluating block-level and top-level timing to ensure optimal performance and power efficiency in advanced cores and SOCs. As a STA Engineer, you will conduct static timing analysis on gate-level PNR netlists, provide feedback to RTL, Synthesis and Physical Design teams to improve PPA, collaborate with cross-functional teams to meet timing constraints, and produce timing ECOs to resolve violations. Your role is crucial in developing high-performance, low-power ASIC solutions that drive the future of technology.*Please note this role will require 5 days per week onsite in our Cork office* You Will Be Responsible For You will be a member of a team working on timing signoff for Snapdragon Cores and SOCs, methodologies and flows:Performing STA and timing closure for complex cores and full-chip SOCsEnhancing techniques and methodologies for STA and timing closureDriving accuracy of timing closure and static/dynamic flows to reduce turnaround timeEnsuring compliance with timing signoff checklists and criteriaAutomation for timing and power data mining and processingParticipating in project proposal development including key milestones and deliverablesExecuting and delivering project goals in a timely manner with production supportResolving issues in all phases of development to ensure smooth project executionWe Would Love To SeeExpertise in STA tools (PrimeTime, PrimeShield or Tempus) used for hierarchical analysis in large SoCsHands-on experience with Tweaker, PrimeClosure, PTECO, or Tempus ECO for timing closureHighly proficient in automation: Python, TCL or PerlStrong knowledge of ASIC design flows (RTL-to-GDS)Interest in Design for Parametric Yield is an added advantageComfortable with extraction, circuit simulation tools and environments is a plusExcellent problem-solving skills and result-driven approach, able to work and drive practical solutions under research environment.Good communication and personal skills in a multi-disciplinary, fast-paced engineering environment4+ years of related work experienceWhere you will be workingCork has a proud reputation as Ireland's second largest economic engine and is now one of the Top 20 location choices in Europe with 39,000 people being employed by over 170 overseas companies.There's a growing diversity in the region with people from many nationalities relocating to Cork, relishing the opportunity to work and live in a location that offers an excellent quality of life.A gateway to Europe, Cork airport provides access to almost 50 international destinations including transatlantic air routes.Equal Opportunities We are an Equal Opportunity employer; all qualified applicants will receive consideration for employment without regard to race, colour, religion, sexual orientation, gender identity, national origin, disability, veteran status, or any protected classification. What's on OfferApart from working in an open, relaxed and collaborative space, you will enjoy:Salary, stock and performance related bonusMaternity/Paternity LeaveEmployee stock purchase schemeMatching pension schemeEducation AssistanceRelocation and immigration support (if needed)Life, Medical, Income and Travel InsuranceSubsidised memberships for physical and mental well-beingBicycle purchase schemeEmployee run clubs, including, running, football, chess, badminton + many moreMinimum Qualifications:Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.ORMaster's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.ORPhD in Science, Engineering, or related field.References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability- or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. 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