As a Senior Verification Engineer, you will play a crucial role in verification and integrating automotive IPs. You will be part of a dynamic and experienced team and your technical knowledge will lead us to the next level in our mission of excellence.
In your new role, you will:
* Develop and implement verification strategies and methodologies to improve efficiency and quality
* Take over the IP verification (Formal, System Verilog/UVM, and/or Specman/e)
* Analyze and review IP and product specifications for building verification concepts and verification plans
* Collaborate with cross-functional teams to ensure successful project execution
* Help to increase the efficiency of verification activities and support proactive risk management
* Foster a culture of innovation and continuous improvement within the verification team
You are best equipped for this task if you have:
* A bachelor’s degree in electronic or computer engineering or a related field
* A minimum of 10 years of experience in digital verification
* A proven track record of successfully developing and implementing verification methodologies and strategies
* Expert-level knowledge of SystemVerilog, Verilog, OVM, UVM, and VMM, as well as verification EDA tools
* Strong analytical, problem-solving, and decision-making skills, with the ability to think critically and drive results
* Familiarity with Jama and JIRA is a plus
* Fluency in English, with excellent written and verbal communication skills
Contact:
Rita Varandas, LinkedIn
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