General SummaryQualcomm’s Design Technology team is seeking a motivated engineer to drive development of advanced signoff methodologies in STA. The engineer should be proficient in static timing analysis using the Synopsys Primetime toolset and should have strong coding skills in scripting languages such as Python and TCL. Domain knowledge including place and route tools and concepts, power analysis and optimization, and IR drop analysis and optimization is also helpful. The engineer is expected to propose, develop, and validate new methodologies, engage with vendors, CAD, and design teams, and work collaboratively with worldwide teams.Roles and ResponsibilitiesDevelop and drive analysis and optimization methodologies for interaction of IR drop and STADevelop physical‑aware timing and IR drop ECO solutionsCollaborate closely with physical design and timing teams to drive methodologies to optimize power and minimize hotspotsWork with CAD and tool vendors to develop and validate new flows and methodologiesWork on design power profiling and electromigration analysisDevelop strategies for PDN analysis and signoff for 3DIC, datacenter, and chiplet designsRequired Skills and ExperienceExpertise in static timing analysis. Hands‑on experience with Primetime or TempusStrong coding skills in languages such as Python, TCLIn‑depth knowledge of physical designSound conceptual understanding of low power design techniques like voltage/power islands, power gating, clock gating, retention designs etc.Strong methodology development background. Ability to drive solutions by creating and implementing algorithmsStrong analysis and communication skillsPreferred Skills and ExperienceMS/PhD degree in Science, Electrical/Electronics Engineering and 2+ years of industry experienceFamiliarity with PnR tools, FC, Innovus is a plusGood insight in designing flows and software structureBenefitsSalary, stock and performance related bonusMaternity/Paternity LeaveEmployee stock purchase schemeMatching pension schemeEducation AssistanceRelocation and immigration support (if needed)Life, Medical, Income and Travel InsuranceSubsidised memberships for physical and mental well‑beingBicycle purchase schemeEmployee run clubs, including running, football, chess, badminton and many moreWhere you will be workingCork, IrelandEqual Opportunity EmployerWe are an Equal Opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sexual orientation, gender identity, national origin, disability, veteran status, or any protected classification. Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, Qualcomm is committed to providing an accessible process. Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able to participate in the hiring process.Minimum QualificationsBachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.PhD in Science, Engineering, or related field.References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.
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