Company: ASICS Engineering
General Summary
Qualcomm's Mixed‑Signal IP (MSIP) Design Verification team seeks Mixed‑Signal Design Verification Engineers to join us in Cork, Ireland.
The Cork site hosts teams working on cutting‑edge designs for the latest Snapdragon So Cs in the latest technology nodes.
Successful candidates will verify mixed‑signal PHY IPs including DDR, USB, PCIE, e DP, DPRX, HDMI, SGMII, DSI, CSI, PLL and more.
Our team uses the latest tools and verification techniques in leading‑edge silicon nodes at 3nm and below, and works directly with architecture, design, software and So C teams in Ireland and other global Qualcomm locations.
Responsibilities
SV/UVM based Design Verification of Ser Des, DDR & PLL Mixed‑Signal PHY IP
Emulation experience is desired along with SV/UVM based simulation
Work closely with analog and digital front‑end design teams to verify RTL and Analog/Mixed‑Signal Designs in next‑generation Ser Des, DDR & PLL IP
Interact with architecture, design, physical design, software, test and So C teams to verify and integrate Ser Des, DDR & PLL IP designs into the latest Qualcomm Snapdragon products
Skills and Experience We Would Love To See
Bachelor's degree in Engineering, Computer Science or a related field
Experience in design and verification of hardware and software on So Cs and So C/IP methodologies for verifying complex units using industry‑standard tools and technologies
Knowledge in developing unit and So C/IP level test benches using UVM
Constrained random functional verification environment in System Verilog/UVM with excellent debugging skills
Experience in low‑power verification using UPF at RTL and GLS simulation level
Experience in Power Aware Gate Level Simulation (GLS) verification flow with zero delay and SDF‑annotated simulation
Experience of pre‑ and post‑silicon verification test flow and automated test benches, post‑silicon ATE/PTE vector bring‑up and bench characterization support
Knowledge of test‑plan development, coverage (code/functional) analysis, transaction‑level modelling, constrained random verification, assertion‑based and formal verification techniques with System Verilog
Experience with Verilog, System Verilog, Assertions, Python/TCL/Perl/shell‑scripting
Experience in analog mixed‑signal verification techniques will be a plus
Excellent communication skills
Minimum Qualifications
Bachelor's degree in Science, Engineering or a related field
2+ years of design verification, or related work experience
Where you will be working
Cork has a proud reputation as Ireland's second‑largest economic engine and is now one of the top 20 location choices in Europe, with over 170 overseas companies employing 39,000 people.
The region offers a diverse community and an excellent quality of life, and Cork Airport provides access to almost 50 international destinations including transatlantic air routes.
Equal Opportunities
We are an Equal Opportunity employer; all qualified applicants will receive consideration for employment without regard to race, colour, religion, sexual orientation, gender identity, national origin, disability, veteran status or any protected classification.
What's on Offer
Salary, stock and performance‑related bonus
Maternity/Paternity Leave
Employee stock purchase scheme
Matching pension scheme
Education Assistance
Relocation and immigration support (if needed)
Life, Medical, Income and Travel Insurance
Subsidised memberships for physical and mental well‑being
Bicycle purchase scheme
Employee run clubs including running, football, chess, badminton and many more
Contact
If you would like more information about this role, please contact Qualcomm Careers.
For accessibility accommodations, please email disability-accomodations@qualcomm.com.
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