Job Title:
Senior Analog Designer Lead
This role focuses on the development of analog circuits and IPs, specifically power management and clock management sub-systems.
* Implement circuit designs from micro-architecture to implementation.
* Collaborate with architects, digital design teams, project management, and other design teams worldwide.
* Participate in developing IP sub-systems for Treo Platform.
Requirements:
* BS in Electrical Engineering or related field with 15+ years of experience, or MS with 12+ years of experience in analog circuit design and layout.
* Deep understanding of operating principles of analog building blocks like PLLs, clock circuits, power management circuits, LDOs, and power-on-reset modules.
* Ability to create behavioral models of such IPs.
* Experience in developing ASIC/Mixed signal ICs as part of a larger team.
What We Offer:
* Competitive salary and benefits package.
* Opportunities for career growth and professional development.