About the role
Qualcomm’s Mixed-Signal IP (MSIP) Design Verification team is seeking Mixed-Signal Design Verification Engineers to join our team in Cork, Ireland. The Qualcomm Cork site is home to a range of MSIP teams working on cutting edge designs for the latest Snapdragon SoCs in the latest technology nodes, and the successful candidate will work on mixed-signal verification for several key mixed-signal PHY IPs including DDR, USB, PCIE, eDP, DPRX, HDMI, SGMII, DSI, CSI as well as PLL IP and more.
The Design Verification team in Cork uses the latest tools and verification techniques in leading edge silicon nodes at 3nm and below and team members work directly with architecture, design, software and SoC teams in Ireland and other global Qualcomm locations.
Responsibilities Will Include:
* SV/UVM based Design Verification of SerDes, DDR & PLLMixed-Signal PHY IP
* Emulation experience is desired along with SV/UVM based simulation.
* Work closely with analog and digital front-end design teams to verifyRTL and Analog/Mixed-Signal Designs in next-generationSerDes, DDR & PLL IP
* Interact with architecture, design, physical design, software, test and SoC teams to verify and integrateSerDes, DDR & PLL IP designs into the latest Qualcomm Snapdragon products
Skills And Experience We Would Love To See
* Bachelor's degree in Engineering, Computer Science or related field.
* Experience in design and verification of hardware and software on SoCs and SoC/IP Methodologies for verifying complex units using industry standard tools and technologies
* Knowledge in developing unit and SoC/IP level test benches using UVM.
* Constrained random functional verification environment in System Verilog/UVM with excellent debugging skills.
* Experience in Low power verification using UPF at RTL and GLS simulation level.
* Experience in Power Aware Gate Level Simulation (GLS) verification flow with zero delay and SDF annotated simulation.
* Experience of pre and post-silicon verification testflow and automated test benches. Post silicon ATE/PTE vector bringup and bench characterization support.
* Knowledge of test-plan development, coverage (code/functional) analysis, transaction level modelling, constrained random verification, assertion based and formal verification techniques with System Verilog
* Experience with Verilog, SystemVerilog, Assertions, Python/TCL/Perl/shell-scripting.
* Experience in analog mixed signal verificationtechniques will be a plus.
* Excellent communication skills
Minimum Qualifications:
* Bachelor's degree in Science, Engineering, or related field.
* 2+ years design verification, or related work experience.
Where you will be working
Cork has a proud reputation as Ireland's second largest economic engine and is now one of the Top 20 location choices in Europe with 39,000 people being employed by over 170 overseas companies.
There's a growing diversity in the region with people from many nationalities relocating to Cork, relishing the opportunity to work and live in a location that offers an excellent quality of life.
A gateway to Europe, Cork airport provides access to almost 50 international destinations including transatlantic air routes.
Equal Opportunities
We are an Equal Opportunity employer; all qualified applicants will receive consideration for employment without regard to race, colour, religion, sexual orientation, gender identity, national origin, disability, veteran status, or any protected classification.
What's on Offer
Apart from working in an open, relaxed and collaborative space, you will enjoy:
* Salary, stock and performance related bonus
* Maternity/Paternity Leave
* Employee stock purchase scheme
* Matching pension scheme
* Education Assistance
* Relocation and immigration support (if needed)
* Life, Medical, Income and Travel Insurance
* Subsidised memberships for physical and mental well-being
* Bicycle purchase scheme
* Employee run clubs, including, running, football, chess, badminton + many more
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