Role
Team Lead & Sr Principal Consultant | Semiconductor, Embedded Systems, CPU, GPU
UVM Design Verification Engineer
Working with a globally leading Semiconductor company working on cutting edge ASICs, SoCs and IPs.
Responsibilities
Perform verification planning
Responsibility for the development of the
verification environment from scratch using UVM.
Responsibility for the functional verification and code coverage
Defining and implementing test cases
Regression debug support, and other flow/infrastructure development
Implement verification of
ASICs / IC'S / SoC's
Skills
SystemC / C/C++ is a plus
Good knowledge of scripting language such as Python, CSH, Make
#verification #UVM
Privacy notice
By applying to this role you understand that we may collect your personal data and store and process it on our systems.
For more information please see our Privacy Notice (
Seniority level
Mid-Senior level
Employment type
Full-time
Job function
Engineering, Design, and Research
Industries
Semiconductor Manufacturing, Computer Hardware Manufacturing, and Appliances, Electrical, and Electronics Manufacturing
Referrals increase your chances of interviewing at European Tech Recruit by 2x
#J-18808-Ljbffr