Our vision is to empower next-generation computing experiences. To achieve this, we are seeking a senior Design Verification Engineer to join our Analog and Digital-RF team.
The Role:
* Develop and execute verification plans for complex semiconductor designs.
* Design and implement advanced verification environments using industry-standard methodologies such as UVM (Universal Verification Methodology).
* Write and debug System Verilog and UVM-based testbenches to verify design functionality and performance.
* Develop and implement coverage-driven verification strategies to ensure comprehensive validation of design features.
About You:
Create an E-mail Alert
Job alert activated
Saved
Save