An industry-leading semiconductor company is looking for an EVA/Video Emulation Engineer to join their dynamic Video Verification Team and contribute to delivering emulation-based solutions that power next-generation video technologies. In this role, you’ll work closely with design, performance, firmware, and software engineers to verify and validate advanced video core features and hardware performance.
Key Responsibilities
* Collaborate with video design, performance, firmware, and software teams to deliver high-quality emulation-based verification solutions for video cores.
* Architect and develop testbench infrastructure in C/C++ and SystemVerilog to enable verification across multiple emulation platforms.
* Define and implement scalable verification methodologies that ensure portability across simulation and emulation environments.
* Debug performance and resource utilization issues on emulation platforms to optimize efficiency.
* Build environments for executing verification test cases, performing performance estimation, and enabling firmware use-case bring-up.
* Develop debugging frameworks and methodologies for efficient root-cause analysis of functional and performance issues.
* Partner with the emulation CAD team to address infrastructure challenges and ensure productivity with emulation models.
* Execute comprehensive verification plans, including design bring-up, environment setup, regression execution, and test failure debug.
* Demonstrate strong understanding of interconnect protocols such as APB, AHB, AXI, ACE, ACE-Lite, and NoC architectures.
* Integrate and configure verification IP (VIP), register models, and design debug features.
Key Qualifications
* 3–5 years of relevant experience with emulation platforms such as Palladium, ZeBu, Veloce, or FPGAs.
* Proven experience synthesizing and optimizing designs and verification components in synthesizable Verilog.
* Hands‑on experience developing C/C++ DPI transactors and monitors.
* Proficiency in scripting languages such as Perl, Python, or Shell; experience with cloud‑based workload packaging is a plus.
* Experience debugging ARM CPU–based designs; familiarity with ARM ISA and the programmer’s model is advantageous.
* Knowledge of video codec architecture and design is a strong plus.
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