My client is currently seeking an experienced
SoC Lead Engineer / Architect
to take the lead in the architecture, microarchitecture, and design of next-generation edge AI and imaging SoCs. This is a senior, hands-on role with responsibility for driving the front-end design of complex, low-power, high-performance SoCs.
Working in a highly collaborative environment, you will partner with verification, validation, FPGA, and physical design teams to deliver innovative silicon solutions for next-generation AI-driven devices.
Key Responsibilities
* Lead the architectural definition and microarchitectural design for advanced digital SoC modules.
* Own the front-end design flow from specification to RTL implementation.
* Define low-power architectures and SoC-level power management strategies.
* Deliver high-quality, synthesizable RTL (Verilog) and integrate internal and third-party IP.
* Collaborate with verification and FPGA teams on test planning and debug.
* Partner with physical design to meet aggressive performance, area, and power targets.
* Apply advanced design methodologies (synthesis, lint, CDC, formal verification, UPF, DFT/MBIST).
* Leverage scripting skills (Python, Perl, TCL) to streamline and automate workflows.
Qualifications & Experience
Required
* Degree in Electronics / Electrical Engineering or related field.
* 12+ years' proven experience in SoC architecture, design, and debugging.
* Track record of delivering SoCs from concept through to tape-out.
* Strong expertise in SoC methodologies and IP integration.
* Ability to lead technical programs across multiple sites.
Preferred
* Experience with advanced nodes (TSMC 12nm and below, Samsung 8nm and below).
* Familiar with Synopsys/Cadence IP and SRAM memory integration.
* Delivered SoCs incorporating DFT/MBIST architectures.
* Knowledge of packaging techniques (WLCSP, FCCSP, 2D/2.5D) and commercialization.
* Exposure to fast-paced startup or scale-up environments.
Why Apply
* Opportunity to lead high-impact SoC programs at the forefront of AI and imaging.
* Collaborate with global experts in NPUs and silicon system design.
* Join a flexible, innovation-driven environment where technical leadership is highly valued.