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A leading tech giant based in Cork are seeking to bolster their team with a talented, self-driven EVA/Video Design Verification Engineer.
What to expect from this role:
* Design, implement, and maintain SystemVerilog/UVM testbenches to verify the architecture and performance of computer vision IPs
* Collaborate cross-functionally with architecture, software, firmware, design, modelling, emulation, and post-silicon teams to develop verification methodologies and test content
* Participate in micro-architecture review and manage system-level testing including directed testcases and standards compliance suites
* Develops automation frameworks for continuous integration and testing to ensure up-to-date IP validation
* Writes technical documentation and feature descriptions, with scripting and automation skills (Python, Make) supporting verification tasks; formal verification experience is a plus
Requirements:
* At least 2 years of experience in design verification using UVM and assertion-based methodologies
* Proven track record verifying complex SoCs or SoC subsystems, including cache and DDR memory protocol validation
* Familiarity with firmware and driver development in C++ to support verification activities
* Hands-on involvement in successful tapeouts, from initial design through post-silicon debugging
* Experience with formal verification, power-aware simulation, performance and power verification, and gate-level simulation
If this role is of interest please apply directly on LinkedIn or send a copy of your CV to alex@eu-recruit.com.
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Seniority level
* Seniority level
Mid-Senior level
Employment type
* Employment type
Full-time
Job function
* Job function
Information Technology
* Industries
Software Development, IT System Custom Software Development, and Technology, Information and Media
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