Overview
Job Title: Principal Analog Design Engineer
Location: Cork, Ireland
Reports to: Design Engineering Group Director
Job Overview
Lead analog and mixed signal design of high-speed memory interface analog components used in state-of-the-art DDR memory interface PHYs in leading edge technology nodes.
Blocks include IOs, amplifiers, comparators, drivers, duty cycle correctors, PLLs, DLLs, level shifters, and more in advanced IC nodes in volume production.
As Principal Design Engineer, you will provide technical direction and coordination to the analog IC design team and identify opportunities to advance analog design technology and participate in strategic internal analog IP development.
Job Responsibilities
Design of high-speed memory interface products at data rates up to and exceeding 36 Gbps on leading edge technology nodes (e.g., 5nm FinFET CMOS).
Design and development of analog/mixed-signal IC circuit blocks from initial concept/specification through final verification of conformance to customer specifications.
Collaborate with Physical Design Engineers to design IC circuit blocks and PMA sections.
Work with Technical Team Leads in circuit design and architectures.
Mentor junior design engineers as needed.
Coordinate with global teams (US, India, China, EU) working in different time zones.
Job Qualifications
Successful candidate should be BEng, MEng qualified or have an equivalent qualification.
Minimum of 4 years of CMOS design experience, preferably in CMOS SERDES, DDR or high-speed I/O IC design.
Good understanding of jitter and signal equalization techniques.
Design experience in SERDES circuit blocks such as Driver, Receiver, Serializer, Deserializer, Phase Interpolator, Low jitter PLL, High Speed Clock Distribution, Bias and Bandgap, Voltage Regulators.
Excellent problem-solving skills, analog aptitude, good communication skills and ability to work cooperatively in a team.
Proficiency with CAD tools for circuit simulation, layout and physical verification.
Cadence tool experience and design experience in lab test as part of silicon evaluation is advantageous.
Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization.
We strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace.
We're doing work that matters.
Help us solve what others can't.
Seniority level
Mid-Senior level
Employment type
Full-time
Job function
Engineering and Information Technology
Industries
Software Development
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Ringaskiddy, County Cork, Ireland
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