2 weeks ago Be among the first 25 applicants
Get AI-powered advice on this job and more exclusive features.
Direct message the job poster from European Tech Recruit
If you are looking to join state of the art semiconductor companies, feel free to get in touch with me on lh@eu-recruit.com. I am pretty sure, we do…
We are seeking Senior Design Verification Engineer (m/f /d) / ASIC / UVM / System Verilog to join a multinational, company, a leading technology innovator. Our client pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all.
Please note you must have the Right to Work in the EU / UK or already based in the UK to be considered.
What we look for somebody, who are able to
* Deploy Industry-Leading Verification Methodologies such as UVM and Formal Verification
* Developing Testbenches and Verification Components such as UVCs, C models, and Vertical/Horizontal re-usable Verification Environments.
* Verifying sensor algorithms RTL for ASIC tapeout quality delivery
* Test plan development based on Design documents and interaction with design/systems engineers
* Implementing C model integration within UVM framework.
* Writing SystemVerilog assertions
* Debugging, verifying, optimizing, and bit-exact matching with test vectors
* Analyzing coverage data and working with Design teams to address coverage holes
* Develop/augment framework for running regressions
* Debugging regression failures with design/Systems teams
* Support integration of design in higher-level subsystem including test planning, test vector delivery, and debug of test vectors at the integration level
* Python automation for improving workflows and team efficiency
* Participate in all project reviews
* Supporting software and other teams with debug
* Documentation
Required skills:
* Bachelor's degree in Science, Engineering, or related field.
* 3+ years ASIC design verification, UVM-based functional verification, or related work experience.
* Experience using formal verification tools like Jasper or VC_Formal is a plus
* Experience with SystemC and Matlab are a plus.
* Gate level Simulation debug and usage of power extraction tools is a plus
* Experienced with constrained-random verification environment and flow build-up with UVM, Coverage-Driven verification methodology
* Experienced with Assertions like System Verilog Assertions
* Experience with debugging test failures and report verification result to achieve the expected code/functional/line coverage goals
* Extensive usage of RTL simulation tools.
* Familiarity with C/C++
* Strong analytical skills and ability to work in a dynamic and fast paced team environment
* Excellent written and verbal skills
* Strong interpersonal skills and a good team player
If this sounds interesting and you'd like to learn more, click the link below to apply or email me with a copy of your resume on lh@eu-recruit.com
By applying to this role you understand that we may collect your personal data and store and process it on our systems. For more information please see our Privacy Notice https://eu-recruit.com/wp-content/uploads/2024/07/European-Tech-Recruit-Privacy-Notice-2024.pdf
Seniority level
* Associate
Employment type
* Full-time
Industries
* Semiconductor Manufacturing and Staffing and Recruiting
Referrals increase your chances of interviewing at European Tech Recruit by 2x
Get notified about new Design Verification Engineer jobs in Cork, County Cork, Ireland.
Related jobs in Cork, Ireland
* CPU Design Verification Engineer, Staff - Cork, Ireland
* HW Design Verification Engineer - Cork, Ireland
* Sensors Design Verification Engineer, Staff - Cork, Ireland
* Senior/Staff - Mixed-Signal Design Verification Engineer - Cork, Ireland
* Mixed-Signal Digital Design (RTL) Engineer - Cork, Ireland
* Design Verification Engineer - CPU / Micro-Processor Verification / Random Instruction Sequencing
Carrigtwohill, County Cork, Ireland 5 days ago
Other related roles
* Senior Principal SoC IP Design Verification Engineer
* ASIC Hardware Design Engineer - ASIC / SoC / RISC-V
We’re unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI.
#J-18808-Ljbffr