Job Description
The role involves participating in various sensors systems engineering activities within the group of sensor technologies. The primary focus will be on deploying cutting-edge verification methodologies, developing testbenches and verification components, and verifying sensor algorithms RTL for ASIC tapeout quality delivery.
Key responsibilities include:
* Implementing UVM-based verification methodologies and testbenches.
* Developing and integrating C models within the UVM framework.
* Verifying sensor algorithms RTL for ASIC tapeout quality delivery.
* Test plan development based on design documents and interaction with design/systems engineers.
* Debugging, verifying, optimizing, and bit-exact matching with test vectors.
The successful candidate will have experience with constrained-random verification environments, flow build-up with UVM, coverage-driven verification methodology, and assertions like System Verilog Assertions.
Required Skills and Qualifications
Applicants should possess a Bachelor's degree in Science, Engineering, or related field, and have 6+ years of ASIC design verification, UVM-based functional verification, or related work experience.
Desirable skills include:
* Experience using formal verification tools like Jasper or VC_Formal.
* Proficiency in SystemC and Matlab.
* Gate level simulation debug and usage of power extraction tools.
Benefits
Successful applicants will enjoy a competitive salary, stock, and performance-related bonuses. Additionally, they will have access to:
* Maternity/paternity leave.
* Employee stock purchase scheme.
* Matching pension scheme.
* Education assistance.
* Relocation and immigration support (if needed).
* Life, medical, income, and travel insurance.
* Subsidized memberships for physical and mental well-being.
* Bicycle purchase scheme.
Others
Qualcomm is committed to creating a diverse and inclusive environment. We welcome applications from individuals with disabilities and offer reasonable accommodations during the application/hiring process.