Job Description We are seeking an experienced Verification Engineer to join our team in Cork, Ireland. This role will involve working on cutting-edge designs for the latest Snapdragon SoCs in leading-edge silicon nodes at 3nm and below. Responsibilities: 1. SV/UVM based Design Verification of Ser Des, DDR & PLL Mixed-Signal PHY IP 2. Emulation experience is desired along with SV/UVM based simulation 3. Work closely with analog and digital front-end design teams to verify RTL and Analog/Mixed-Signal Designs in next-generation Ser Des, DDR & PLL IP 4. Interact with architecture, design, physical design, software, test and SoC teams to verify and integrate Ser Des, DDR & PLL IP designs into the latest Qualcomm Snapdragon products 5. Skillful debugging skills using constrained random functional verification environment in System Verilog/UVM for complex units verification 6. Leverage industry-standard tools like UVM for developing unit-level test benches for hardware/software development integration testing sessions ？ ｡; /tr /ﾞ ',/span style='border: none width=device-width height=\