**Staff CPU Physical Design Engineer Opportunity**
We are partnering with a leading technology firm to expand their research and development capabilities in Cork, Ireland.
This is a permanent working opportunity that requires experienced engineers to drive architectural definition, circuit-level specifications, and simulation strategies across the full ASIC development lifecycle.
Responsibilities:
* Lead physical design of digital and/or analog IP to meet aggressive power, performance, and area (PPA) goals.
* Define architectures, circuit-level specifications, and simulation strategies for complex IC designs.
* Own end-to-end ASIC development: RTL, synthesis, P&R, STA, and sign-off using industry-standard tools.
* Collaborate with system architects, hardware, and software teams to ensure implementation success.
* Utilize scripting languages (Tcl, Python, Perl) and design/verification tools to optimize IC design.
* Mentor junior engineers and prepare technical documentation to support project delivery.
Qualifications:
* Bachelor's degree with 6+ years, Master's with 5+ years, or PhD with 4+ years of experience in ASIC/SoC design and physical implementation.
* Proficient in architecture-level planning, RTL design, verification, and physical closure.
* Strong background in digital/analog IP development and IC package integration.
* Skilled in scripting and use of design/verification tools.
* Proven ability to lead projects and collaborate with senior technical and leadership teams.