High Level Synthesis Engineer - HLS / Stratus / Catapult / C++ / RTL
We are partnered with a leading Semicon company focused on building next generation digital hardware and they are searching for an HLS Engineer to join their design group.
About them:
The team works on algorithm to silicon flows, taking high level concepts and converting them into efficient RTL. They use leading HLS tools to deliver designs that meet aggressive performance, power, and area requirements. You will join a group that values analytical thinking, clean design, and technical collaboration.
You will work with C or C++, SystemVerilog, and HLS tools to produce production ready RTL. The role involves algorithm breakdown, hardware optimization, and verification and also supports hands on bring up.
What you will do:
* Convert high level algorithms into RTL using HLS
* Guide HLS tools with constraints and directives
* Optimize designs for power, performance, and area
* Work with RTL teams to support downstream integration
* Develop verification environments for HLS generated modules
* Participate in bring up and hardware debugging
What they look for:
* Experience with HLS tools such as Stratus, Catapult, or similar
* Strong C or C++ and RTL design skills
* Understanding of processor or hardware architecture
* Experience with FPGA or ASIC flows
* Analytical problem solving and strong communication skills
What is in it for you?
* Work on products that translate advanced algorithms into real hardware
* Join a team that values innovation and technical depth
* Opportunities for growth across design and verification
* Play a key role in a fast paced engineering environment
* Receive an excellent total package consisting of base, bonus, RSU, bonus RSU and relocation assistance if needed.
If this sounds interesting and you'd like to learn more, click the link below to apply or email me with a copy of your CV on
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