Job Title: CPU Design Engineer
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We are seeking an experienced CPU Design Engineer to lead complex physical design efforts across the full ASIC development lifecycle. The ideal candidate will have a strong background in digital/analog IP development and IC package integration.
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Responsibilities:
* Lead physical design of digital and/or analog IP to meet aggressive power, performance, and area (PPA) goals
* Define architectures, circuit-level specifications, and simulation strategies
* Own end-to-end ASIC development: RTL, synthesis, P&R, STA, and sign-off
* Work cross-functionally with system architects, hardware, and software teams to ensure implementation success
* Utilize industry-standard tools for RTL-to-GDS flows and physical implementation (e.g., Virtuoso, Synopsys, Cadence)
* Prepare technical documentation and mentor junior engineers
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Qualifications:
* Bachelor's degree with 6+ years, Master's with 5+ years, or PhD with 4+ years of experience in ASIC/SoC design and physical implementation
* Proficient in architecture-level planning, RTL design, verification, and physical closure
* Strong background in digital/analog IP development and IC package integration
* Skilled in scripting (Tcl, Python, Perl) and use of design/verification tools
* Proven ability to lead projects and collaborate with senior technical and leadership teams
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Benefits:
* Competitive salary and benefits package
* Opportunity to work on complex and challenging projects
* Collaborative and dynamic work environment
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Others:
* This is a permanent working opportunity based in Cork, Ireland
* Candidate must be proficient in English language