Job Title
We are seeking a seasoned Digital Verification Engineer to join our Mixed-Signal IP Design team.
* This position involves the verification of mixed-signal PHY IPs including DDR, USB, PCIE, eDP, DPRX, HDMI, SGMII, DSI, CSI, PLL, and more.
* The successful candidate will utilize advanced tools and methodologies to deliver high-quality designs in leading-edge silicon nodes at 3nm and below.
* This role requires close collaboration with cross-functional teams including architecture, design, software, and SoC to ensure seamless integration of SerDes, DDR, and PLL IP designs into Qualcomm Snapdragon products.
Responsibilities:
* Silicon Validation and Verification of Complex Mixed-Signal Designs
* Emulation and Simulation using UVM/SV
* Cross-Functional Collaboration for Design Integration and Validation