Company
QT Technologies Ireland Limited
Job Area
Engineering Group, Engineering Group > ASICS Engineering
General Summary
As a member of the Graphics team, the successful applicant will help develop new flows/methodologies and algorithms to improve power, performance and area (PPA) on state‑of‑the‑art GPU cores while working closely with the graphics microarchitecture design and implementation teams. The successful candidate will possess basic understanding of RTL design and ASIC design flow from RTL to GDS such as synthesis, static timing analysis, formal verification, physical design, ECO generation and verification. They will collaborate with multiple functional teams including design, technology, power, implementation, sign‑off and post‑silicon to drive PPA improvements into GPU cores.
Knowledge and Experience
Implementation and delivery of GPU cores from RTL to GDSII
Semi‑custom design flow and methodology development
Identifying areas for flow and process improvements
Verilog and System‑Verilog languages
RTL synthesis using physically aware tools
Design constraint management for power, timing, clocking, interfaces
Formal Verification for RTL‑netlist and netlist‑netlist checks
Clock Tree Analysis and Optimization
ECO methods for functional and timing fixes
Managing design goals and tradeoffs in power, performance, and area
Preferred Qualifications
At‑least 5‑7 years of experience developing methodologies for PPA improvement
Basic understanding of digital design and RTL development
Hands on experience with EDA tools such as Synopsys Fusion Compiler, Synopsys RTL‑Architect, PrimePower, PrimeTime and Prime Closure
Script writing experience in UNIX shell, Python, Perl and/or TCL
Excellent interpersonal and analytical skills as well as ability to work independently
Highly motivated, excellent team spirit, obsession with deliverable quality and customer oriented
Education Requirements
Preferred: Master’s, Computer Engineering and/or Computer Science and/or Electrical Engineering
Required: Bachelor’s, Computer Engineering and/or Computer Science and/or Electrical Engineering
Location
Cork has a proud reputation as Ireland's second largest economic engine and is now one of the Top 20 location choices in Europe with 39,000 people being employed by over 170 overseas companies. There is a growing diversity in the region with people from many nationalities relocating to Cork, relishing the opportunity to work and live in a location that offers an excellent quality of life. A gateway to Europe, Cork airport provides access to almost 50 international destinations including transatlantic air routes.
Equal Opportunity
We are an Equal Opportunity employer; all qualified applicants will receive consideration for employment without regard to race, colour, religion, sexual orientation, gender identity, national origin, disability, veteran status, or any protected classification.
Benefits
Salary, stock and performance related bonus
Maternity/Paternity Leave
Employee stock purchase scheme
Matching pension scheme
Education Assistance
Relocation and immigration support (if needed)
Life, Medical, Income and Travel Insurance
Subsidised memberships for physical and mental well‑being
Bicycle purchase scheme
Employee run clubs, including running, football, chess, badminton and many more
Minimum Qualifications
Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience
OR Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience
OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience
References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfil the principal duties of the role and possesses the required competencies.
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