We're seeking a talented individual to join our Wireless Engineering team as a Graduate Analog Layout Design Engineer in advanced process technology node 7nm and below.
Job Description:
* Develop multi-giga-sample RF data converters which are key components of the Zynq Ultra Scale+ RFSoC and Zynq RFSoC DFE families at high frequency (5 GHz) and high resolution (12-bit).