Client
Our client a leading Multinational Semiconductor Telecom Company requires Staff Analog Mixed-Signal SerDes Design Engineer for role based in Cork City, Ireland.
You will be required to be onsite 5 days per week.
Role
The successful candidate will work on analog and mixed-signal integrated circuits for high-speed PHY receivers and drivers, VCOs, PLLs, and a range of other custom IP for Mobile, Auto, IoT & Compute SoC products.
The primary focus of the work is on low-power and low-voltage mixed-signal design with emphasis on advanced nanometre FinFET and GAA technology nodes.
The successful candidate will both design key circuit blocks and work closely with layout engineers to ensure the layout is fully optimised and complies with best analog layout practices.
You will be directly involved in delivering next-generation SerDes and PLL designs for SoCs and will be part of a large analog mixed-signal design team involved in architecture analysis and IP delivery in leading-edge FinFET and GAA process technology nodes at 3nm and below.
Requirements
The role requires industry experience in transistor-level circuit implementations or highly relevant academic experience in a Masters' or PhD program focused on full custom analog circuit design using CMOS technologies.
In addition to Analog and Mixed-Signal circuit design expertise, good understanding of device physics, analog circuit custom layout, power distribution networks (PDN), mixed-signal design flow, SoC top-level integration and IC Design Tools are desired.
Responsibilities
Architecture, design, and development of analog / mixed signal hard macros for the SerDes IP Design team
Perform custom circuit design in the latest FinFET CMOS process technologies and beyond to support the delivery of SerDes IP
Participate in internal customer requirements discussions
Create design specifications
Create behavioural models in Verilog
Set-up, run and analyse circuit simulations
Perform quality assurance procedures on developed hard macros
Deliver hard macros and support customer integration and testing
Perform silicon characterization analysis and prepare silicon verification reports
Education
Master's or Ph.D. degree in Science, Engineering, or related field.
Experience
A minimum of 3 years plus transistor-level analog mixed-signal design experience, preferably in high-speed wireline SerDes, PLL, DDR or other high speed applications
Experience in SPICE simulators and schematic capture tools
Experience in designing op-amps, bandgaps, differential amplifiers, VCO, PLL, DLL
Experience in high-speed SerDes block level designs such as transmitters, receivers, high speed VGA, CTLE, CDR, etc.
Understanding of signal integrity in high-speed wireline design is preferred
Scripting to automate circuit design and verification work
Full-custom analog layout techniques and the ability to take a design and do all the layout extract verification and sign-off
Excellent communication skills and ability to contribute strongly within a high-performance team.
Contact
For further information please contact Mícheál at Software Placements Ltd on ***** or email
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