About Us
We are seeking a highly skilled Design Verification Engineer to support our GPU verification teams by building scalable, automated simulation environments and infrastructure tools.
This role requires a strong background in Python development, experience in hardware verification, and familiarity with large language models. You will work closely with DV engineers, CAD teams, and IT to streamline verification workflows, improve simulation efficiency, and develop automation solutions that enhance engineering productivity.
Key Responsibilities:
* Design, develop, and maintain infrastructure for large-scale GPU simulation and hardware verification.
* Build automation tools and intelligent agents using Python and large language model-based systems to support DV workflows.
* Collaborate with CAD, IT, and Compute teams to optimize simulation performance and resource usage.
* Support DV engineers with training, troubleshooting, and infrastructure improvements.
* Monitor and enhance simulation environments for reliability, scalability, and efficiency.
Required Skills & Qualifications:
* Knowledge in ASIC design verification, CAD support, or hardware verification roles.
* Strong programming skills in Python (object-oriented design, scripting, automation).
* Experience with large language model agentic systems (e.g., LangChain, AutoGen, or similar frameworks).
* Familiarity with IBM LSF, Synopsys VCS, Cadence Incisive, or Mentor Questa.
* Solid understanding of hardware verification processes and simulation workflows.
* Great communicator and ability to collaborate with multiple teams.
Benefits:
* A competitive salary and bonus structure.
* Stock options and employee stock purchase scheme.
* Maternity/Paternity Leave and flexible working arrangements.
* Education Assistance and relocation support.
* Life, Medical, Income, and Travel Insurance.
* Subsidized memberships for physical and mental well-being.
* Bicycle purchase scheme and employee-run clubs.
Minimum Qualifications:
* Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
* OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
* OR PhD in Science, Engineering, or related field.