Designing the digital backbone of innovative products requires a unique blend of technical expertise and strategic thinking.
Job Title:
Principal Application Engineer
Key Responsibilities:
* Develop a profound understanding of digital microarchitecture definition and documentation.
* Master RTL logic design, debug, and functional verification to drive product success.
* Lead IP integration and verification efforts to ensure seamless system operation.
* Make informed decisions regarding digital architecture trade-offs for power, performance, and area.
* Expertly handle multiple asynchronous clock domains and their crossings.
* Drive synthesis timing constraints, static timing analysis, and constraint development to meet project goals.
* Apply fundamental physical design flows, such as floor planning and clock tree synthesis.
* Consider the impacts of Analog and mixed-signal design and verification on digital-on-top development flow.
* Implement functional ECO flow and conformal ECO with precision.
* Utilize experience with FPGA and/or emulation platforms to drive innovation.
* Firmware development of embedded microcontroller systems is a valuable asset.
Requirements:
* Minimum 5 years of ASIC backend design experience.
* Successful tapeouts in advance technology nodes are a must.
Additional Information:
* Cadence prioritizes equal employment opportunity and employment equity throughout all levels of the organization.
* We strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace.
* Travel: >10%