Senior Linux Kernel Engineer Job Description
We are seeking a skilled and solution-focused engineer to join our team at a senior level.
This role will involve:
* Developing and maintaining SystemVerilog/UVM testbenches to verify computer vision IPs, focusing on structure and performance.
* Collaborating across multiple teams to define verification methodology and execute test content.
* Participating in micro-architecture reviews and system-level testing, including directed test cases and standards compliance.
* Building automation frameworks for continuous integration and testing; utilizing scripting tools like Python and Make.
* Documenting features, writing technical content under guidance, and supporting feature development within defined scopes; formal verification is a plus.
The ideal candidate will have:
* At least 2 years of experience in Design Verification using UVM and assertion-based methods.
* A proven background in verifying complex SoCs or subsystems, including cache and DDR memory protocols.
* Familiarity with firmware/driver development in C++ and has contributed to successful tapeouts through post-silicon debug.
* Exposure to formal verification, power-aware simulations, and performance/power verification techniques.
* Experience with gate-level simulations and related verification workflows.