Job Description:
As a verification engineer, you will play a crucial role in ensuring the accuracy and reliability of our complex semiconductor designs.
Developing and executing comprehensive verification plans is key to delivering high-quality results. You will design and implement advanced verification environments using industry-standard methodologies such as Universal Verification Methodology (UVM).
* Write and debug System Verilog testbenches to verify design functionality and performance
In addition, you will develop coverage-driven strategies to ensure thorough validation of all design features. Collaboration with cross-functional teams including architecture and software teams is essential for seamless integration.