Senior Security Firmware Engineer - Semiconductor / Embedded / C/C++
An industry-leading semiconductor company is seeking an experienced
Security Firmware Engineer
to develop secure computing environments for edge and data center platforms.
This role focuses on enhancing
Trusted Execution Environments (TEE)
on server systems and enabling hardware-assisted accelerators as trusted devices.
You will design and implement solutions to protect sensitive workloads in
TDISP- and SR-IOV–compliant Trusted VMs
across multi-tenant deployments.
Key Responsibilities
Design and develop security software for AI accelerator cards, focusing on TDISP-based trusted device assignment, lifecycle management, and interconnect security.
Implement SR-IOV–based secure execution environments for isolation and attestation of PCIe virtual functions.
Develop or integrate PCIe security protocol software (e.g., SPDM, CMA, MCTP, DOE, IDE) per DMTF and PCI-SIG specifications.
Integrate secure boot, attestation, and policy enforcement within the Trusted Execution Environment (TEE) and overall security architecture.
Optimize enclave memory management and performance while maintaining security guarantees.
Debug complex software issues using JTAG, RAM dumps, and secure debug methods.
Contribute to threat modeling, risk assessment, and compliance with TDISP, OCP, TCG, and Confidential Computing Consortium standards.
Key Qualifications
3+ years of system or embedded software development, ideally focused on platform security.
Strong proficiency in C/C++, debugging, and testing in Linux-based embedded systems.
Experience in device driver development, RTOS, and SoC architecture (cores, memory, buses, I/O).
Solid understanding of cryptographic primitives and their application in secure system design.
Familiarity with secure boot, attestation, TPM, and platform-level security technologies.
Contributions to open-source security or virtualization projects.
Proficiency with git/Gerrit and software debugging tools (compilers, profilers, emulators, JTAG, logic analyzers).
Experience with ARM TrustZone; knowledge of TDISP, SPDM, IDE, DOE, and DICE protocols.
Experience with RISC-V is a plus.
Strong collaboration skills in international, multi-site teams.
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